1. Technical Field
The present invention relates to a phase-shift keying (PSK) receiver, a PSK demodulating circuit, a communication apparatus, and a PSK receiving method, and more particularly, to a phase-shift keying (PSK) receiver, a PSK demodulating circuit, a communication apparatus, and a PSK receiving method, suitable for application to a technology in which a demodulation operation is performed on the basis of an in-phase component I and a quadrature component Q which are converted into a 1-bit digital signal.
2. Related Art
As a semi-synchronous detection method in the PSK demodulation, there are a method in which a carrier wave is synchronized on the basis of the received in-phase component I and the quadrature component Q (JP-A-2001-024726) and a method in which a carrier wave is synchronized on the basis of a phase θ obtained by applying the following formula (1) to the received in-phase component I and the quadrature component Q (JP-A-9-116584).θ=tan−1(I/Q)  (1)
However, according to the method described in JP-A-2001-024726, since the carrier wave is synchronized on the basis of the in-phase component I and the quadrature component Q, it is necessary to multiply complex values in order to compensate the phase of the received signals. The complex multiplication requires four multipliers, which increases the size of the circuit. In addition, according to the method described in JP-A-9-116584, since a phase θ is obtained on the basis of the in-phase component I and the quadrature component Q, it is necessary to perform the calculation in formula (1). The calculation requires a large-capacity ROM, which increases the size of the circuit.
Moreover, in the described methods, the phase compensation operation requires a multi-bit AD converter, which accelerates the increase in the size of the circuit.